Silicon-nanowire and carbon-nanotube transistors: applications in multichannel logic gates

Abstract

Silicon nanowires are in vogue for their potential applications in 22-nm technology. However, silicon is facing tough challenges as carbon-based devices appear on the horizon. The design and applications in logic circuits of transistors based on carbon nanotube (CNT) and silicon nanowire (Si NW) are investigated to assess the performance of these nanostructure devices over and above that of metal- oxide- semiconductor field-effect transistor (MOSFET). The dimension of a CNTFET and Si NWFET contact and channel are based on a 32nm process technology used in industry. The CNTFET circuit model is based on the Stanford University established model whereas the Si NW-FET model is based on the BSIM-CMG 106.1.0. First, the contact size for a 32nm process technology is extrapolated based on the industry standard process technology of 180nm, 90nm, 65nm and 45nm. Then, the number of CNT or NW parallel channel is increased and the resulting effects on the drain current is observed. The distance between these tubes, referred as pitch, are implemented in Stanford model. It is found that the circuit performance is influenced by the fringe capacitance between subsequent tubes. The number of CNT or Si NW that can be placed in the channel is determined to reveal the optimum circuit performance. The drain current (I-V) characteristics of single- and multi-channel CNT or Si NW (p-type and n-type) are also investigated. Following that, the digital logic circuits such as inverter, NOR and NANO are designed and simulated in HSPICE. The performance between CNT and Si NW is also compared in terms of drain induced barrier lowering (DIBL), subthreshold swing and on-off current. It is observed that the performance of the logic circuit is affected significantly by the number of the CNT or Si NW channels as well as the load capacitance. The switching event between PMOS and NMOS generated undesirable spikes. These spikes occurred more often for a complicated logic design like NANO gate and are persistent when number of tubes is increased.