Novel architecture of 1204-point high speed floating point FFT processor

Rozita Teymourzadeh (P45573)

Please use this identifier to cite or link to this item: https://ptsldigital.ukm.my/jspui/handle/123456789/515023

Full metadata record

DC Field	Value	Language
dc.contributor.advisor	Masuri Bin Othman, Prof. Dr.
dc.contributor.author	Rozita Teymourzadeh (P45573)
dc.date.accessioned	2023-10-16T07:53:48Z	-
dc.date.available	2023-10-16T07:53:48Z	-
dc.date.issued	2011-08-11
dc.identifier.other	ukmvital:74352
dc.identifier.uri	https://ptsldigital.ukm.myjspui/handle/123456789/515023	-
dc.description	Electrical motors are vital components of many industrial processes and their operation failure can lead to loss in production. Motors are found in many applications in industrial apparatus such as fans, pumps, household appliances and power tools. Conditioned monitoring of the motor enables early detection of abnormalities; for proactive response maintenance procedures to avoid catastrophe. The diagnosis of motor faults improves the efficiency of industrial plants. Meanwhile the precise analysis and accurate measurement of harmonic provides a reliable scientific industrial application. Hence, the high performance DSP processor is the important method of electrical harmonic analysis. However, it can be realized in embedded systems. In this thesis, the effort was taken to implement a novel high-resolution single chip 1024-point FFT processor architecture for improvement of the harmonic measurement techniques. The thesis starts with design then followed by the simulation and its hardware implementation to demonstrate the benefit that is achieved by the proposed 1024-point FFT processor. Pipelining and parallel implementation were incorporated in order to enhance the performance. The proposed FFT makes use of floating-point to realize higher precision FFT. Since floating-point architecture limits the maximum clock frequency and increase the power consumption, this thesis focuses on improving the speed, area, resolution and power consumption, as well as latency for the FFT. The thesis illustrates very large scale integration (VLSI) implementation of the floating-point parallel pipelined (FPP) 1024-point radix-2 FFT processor with applying novel architecture that makes use of only single butterfly incorporation of intelligent controller. The functionality of the conventional radix-2 FFT was verified by the utilisation of MATLAB software and the comparison was done to prove the functionality of proposed 1024-point radix-2 FPP FFT processor. The design was followed by the very high-speed integrated circuit hardware description language (VHDL) for hardware implementation. The design has been downloaded to the Virtex-II XC2V1500-6-FG676 FPGA board. The Xilinx integrated synthesis environment (ISE) synthesis result shows that the proposed radix-2 FFT architecture can perform at the maximum clock frequency of 227.74 MHz with  2log  11 2 N N  computation complexity where N is the number of input data, which meet our design requirement with much lower latency. For area and power consumption, the proposed radix-2 FPP-FFT was optimized in ASIC under Silterra 0.18 μm and Mimos 0.35 μm technologies libraries. The optimization result from design analyzer (DA) shows the area and power consumption of 2.322.32 mm2 and 640 mW in 0.18 μm Silterra technology and 4.256 4.256 μm and 1.198 W in 0.35 μm Mimos technology libraries respectively. The actual output signal resulted from system implementation shows 5131 clock pulse computation complexity for 1024- point input data which proves the proposed method in this thesis meet the requirement.,Ph.D
dc.language.iso	eng
dc.publisher	UKM, Bangi
dc.relation	Institut Kejuruteraan Mikro dan Nanoelektronik (IMEN) / Institute of Microengineering and Nanoelectronics
dc.rights	UKM
dc.subject	Novel architecture
dc.subject	1204-point high speed floating
dc.subject	FFT processor
dc.subject	Fourier transformations
dc.title	Novel architecture of 1204-point high speed floating point FFT processor
dc.type	Theses
dc.format.pages	210
dc.identifier.callno	QA403.5.T449 2011 3
dc.identifier.barcode	000423
Appears in Collections:	Institute of Microengineering and Nanoelectronics / Institut Kejuruteraan Mikro dan Nanoelektronik (IMEN)

Files in This Item:

File	Description	Size	Format
ukmvital_74352+Source01+Source010.PDF Restricted Access		4.88 MB	Adobe PDF	View/Open

Show simple item record Recommend this item