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Please use this identifier to cite or link to this item: https://ptsldigital.ukm.my/jspui/handle/123456789/578844
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dc.contributor.authorH. Hussin (UITM)
dc.contributor.authorM. F. Zainudin (UITM)
dc.date.accessioned2023-11-06T03:08:50Z-
dc.date.available2023-11-06T03:08:50Z-
dc.date.issued2017-01
dc.identifier.issn0128-7680
dc.identifier.otherukmvital:116260
dc.identifier.urihttps://ptsldigital.ukm.my/jspui/handle/123456789/578844-
dc.descriptionNegative bias temperature instability (NBTI) is a common phenomenon in a p-channel MOSFET device under a negative gate-to-source voltage at a high stress temperature. This paper presents the NBTI characterisation based on different analysis methods and stress conditions on p-MOSFET devices. The atomic hydrogen concentration is probed at interface, Poly-Si and channel of p-MOSFET under study using SILVACO TCAD tool. In addition, the behaviour of the permanent and recoverable component was investigated based on AC stress at different stress conditions using Modelling Interface Generation (MIG) tool. The results show that increases in temperature, negative voltage stress gate and decreases in frequency increase the threshold voltage shift, thus enhancing NBTI degradation.
dc.language.isoen
dc.publisherUniversiti Putra Malaysia Press
dc.relation.haspartPertanika Journals
dc.relation.urihttp://www.pertanika.upm.edu.my/regular_issues.php?jtype=2&journal=JST-25-S-1
dc.rightsUKM
dc.subjectNBTI
dc.subjectTemperature
dc.subjectVoltage stress gate
dc.subjectFrequency
dc.subjectThreshold voltage (Vth
dc.subjectAC
dc.subjectDC
dc.subjectRecovery
dc.titleA study of negative bias temperature instability (nbti) in p-mosfet devices
dc.typeJournal Article
dc.format.volume25
dc.format.pages257-266
dc.format.issueSpecial Issue
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