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Title:	Hardware implementation of current DQ PI controller for permanent magnet synchronous motor drive
Authors:	Mohammad Marufuzzaman (P52909)
Supervisor:	Mohd Alauddin Mohd Ali, Prof. Dr.
Keywords:	Electric motors Synchronous Electric machinery Synchronous Permanent magnet motors Universiti Kebangsaan Malaysia -- Dissertations Dissertations, Academic -- Malaysia
Issue Date:	25-Jun-2012
Description:	Field oriented control (FOC) permanent magnet synchronous motor (PMSM) is a commutatorless motor drive, which has high power density, high air gap flux density, high torque inertia ratio and highest efficiency among all the motor drives. Due to the aforementioned merits of the FOC PMSM drive, this research concentrates on one of the important parts of the system: current dq controller. FOC PMSM needs very quick computation in extremely short time to achieve optimal efficiency and stability of the motor. Therefore, the main objective of this research is to implement a simple and fast current dq controller for high performance FOC PMSM drive systems. A plain and fast controlling technique known as proportional and integral (PI) controller is implemented. Current dq PI controller is usually implemented in digital signal processor (DSP) based computer. However, these digital solutions are still limited for complex control algorithms and suffer from high implementation cost as well as long execution time. The main challenge for researchers is to reduce the execution time to ensure steadiness of the motor, which can be solved by implementing the overall controlling algorithm into Field Programmable Gate Array (FPGA) as well as completing the overall execution within limited clock cycles. Thus, a low cost Altera CycloneTM II EP2C35F67236 FPGA family has been used as target component for the implementation of the proposed current dq PI controller. In this research, Verilog hardware description language (HDL) is used for coding. Quartus II environment is used for register transfer logic (RTL) coding, place and route, while ModelSim SE 6.3a is used to run functional simulations. Agilent 16821A Logic Analyzer is employed to validate the result of the implemented design in FPGA, which is connected with the Altera DE2 board through general-purpose input, output (GPIO) interfaces. The test pattern is given by a pattern generator and the output is captured by the logic analyzer for real time testing. The overall module is tested in three different clock frequencies to verify the clock cycles similarity. The overall controller is developed based on modular design for faster calculation and fixed-point calculation method is applied to improve the precision of the output. Experimental results indicate that the proposed current dq PI controller needs no more than two clock cycles for execution. Thus, the controller reduces the execution time to only 50 ns with operating frequency of 40 MHz. Moreover, the accuracy of the output is more than 99.98 %. The proposed FPGA based current dq PI controller appreciably outperforms the DSP based solutions at a lower execution time with better accuracy. Furthermore, the execution time of the proposed hardware implementation is smallest compared to previous works. Thus, the research work offers an accurate and rapid solution for current dq PI controller, which will improve the overall efficiency and stability of the FOC PMSM drive.,Master of Science,Certification of Master's / Doctoral Thesis" is not available"
Pages:	107
Call Number:	TK2787.M845 2012 3 tesis
Publisher:	UKM, Bangi
Appears in Collections:	Faculty of Engineering and Built Environment / Fakulti Kejuruteraan dan Alam Bina

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