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Title:	Design of a low power compact direct conversion transmitter in 0.13µm CMOS process for 2.4 GHz rf devices
Authors:	Md Torikul Islam Badal (P84117)
Supervisor:	Md Mamun Ibne Reaz, Prof. Dr.
Keywords:	Metal oxide semiconductors
Issue Date:	22-Mar-2018
Description:	The fully integrated complementary metal-oxide-semiconductor (CMOS) transmitter is an essential component in every wireless communication system. In order to ensure highly efficient signal processing and data transmission in such devices, a low power, low-cost compact RF transmitter is required. The performance of the transmitter significantly affects the overall performance of the RF devices. The implementation of the modern CMOS transmitter in different wireless communication devices in the past decade has increased remarkably because of the persistent scaling of CMOS technology. Despite rapid advances in CMOS process, achieving this goal remains challenging for system-on-chip designers. Among all types of transmitter architecture, the direct-conversion Transmitter (DCT) is considered as the best-suited architecture for the full system integration because of its simple circuitry. The DCT typically comprises of low pass filter (LPF), up-conversion mixer, power amplifier (PA) and local oscillator signal generation circuits. Each module has its own constraints such as low bandwidth and low gain in the LPF, high noise and low conversion gain in the mixer, high power consumption, nonlinearity and limited output power in the PA. The DCT as a whole also suffers from limitations such as flicker noise, nonlinearity, and high power consumption. The aim of this work is to design a DCT with power consumption at less than 4.5 mW with die area less than 0.1 mm2. To achieve the aims, 3rd order-Butterworth LPF using the active-RC circuit integrating an operational amplifier, a double balanced mixer design and an inductor less self-biased cascode design of power amplifier have been proposed. The Linearity, low gain and high power consumption issues in the DCT design have been improved and optimized. The proposed circuit for the whole transmitter including all individual modules has been simulated using ELDO RF tool of silterra 0.13-µm standard CMOS process in Mentor Graphics environment. The results obtained from the post-layout simulation show that the LPF achieved peak to peak gain 77.72 dB, power consumption 0.68 mW and chip size 0.013 mm2 with cut off frequency 350 kHz at frequency set 1 kHz-110MHz; the mixer circuit achieved a conversion gain of 12.86 dB, and a power consumption of 1.17 mW covering 0.0032 mm2; the PA produced 16.8 dBm output power, consuming only 1.73 mW of power and covering very small chip area of 0.059 mm2. The designed 2.4 GHz DCT in total consumed 3.61 mW power from a single 1.2V supply voltage and occupies an area (without I/O pads) of 0.089 mm2 which are the lowest compared to recent researches. Therefore, the proposed fully integrated DCT will ensure the portability of 2.4 GHz RF devices with the improved performance of different parameters.,Master of Science
Pages:	130
Call Number:	TK7871.99.M44B336 2018 3 tesis
Publisher:	UKM, Bangi
Appears in Collections:	Faculty of Engineering and Built Environment / Fakulti Kejuruteraan dan Alam Bina

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